Design of High Speed and low power D Flip-Flop by CNTFET Technology


نویسندگان: مرتضی داداشی – کوروش منوچهری کلانتری – سادات پور مظفری

سال: ۱۳۹۵

زبان: انگلیسی

سومين كنفرانس بين المللي مهندسي دانش بنيان و نوآوري (KBEI-2016)

کلمات کلیدی:

CNT- CNTFET- D Flip – Flop – High Speed – Circuit simulation


Flip-flops are widely used to receive and maintain data in selected sequences during recurring clock intervals for a limited period of time sufficient for other circuits within a system. So increasing the speed and decreasing power of the flip-flops caused to increase the total speed and decrease the power of the circuits. This paper purpose is twofold, High-Speed and low power design of D flip-flop using Carbon NanoTube Field Effect Transistors (CNTFETs). The proposed designs were simulated using HSPICE simulator with 32nm Stanford CNTFET model. simulation results are based on 1 volt power supply voltage and operating frequency at 1 GHZ, the proposed designs is 44% faster and consumes 29% less power compared with recent existing conventional CNTFET based D flip-flop circuits



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